Multi-Gigabit Backplanes/Midplane Simulation and Design

With today’s telecommunications, enterprise, storage, medical and video networking equipment there is the ever-present need to provide as much bandwidth as possible in these high performance products. This requires extremely fast switching engines, which then need to be interconnected with non-blocking, high-speed connections from board to board. This forces today’s backplane designer to enter a new and difficult realm in which very critical techniques/attributes must be employed for the success of the product. Interconnect Engineering can provide the necessary simulation and design expertise for your company’s 1 to 12.5Gbit/s designs, and beyond, with the following:

  • Very familiar with all aspects (electrical, mechanical, etc.) of popular backplane connection systems.

  • Designs are partitioned for minimum layer count to reduce PCB costs in production. For instance, connector pin out choices, interface locations, etc. can increase layer count. Full connection analysis that includes layout floor-planning can and should be done.

  • Effort to utilize low cost FR4 PCB material as a first resort. Very familiar with other materials such as Nelco 4000-13EP/SI, if the design warrants.

  • Interconnect engineering analysis using Hspice, Sisoft's QSI-300, 3D field solvers such as Ansoft HFSS for all features of the entire interface such as silicon, package parasitics, vias, passive components, component pads, transmission lines and connectors. Quantum Channel Designer can also be supported if needed.

  • Complete path extraction, in the form of S-parameter models, from board level designs with SIwave.

  • Full crosstalk analysis of all high-speed differential pairs.

  • All analysis done over silicon process, voltage, and temperature to ensure robust design so time to market is minimized. Monte Carlo analysis of board design can be done if further accuracy is needed.

  • Many techniques utilized to ensure low loss transmission such as via transmission (minimizes stub effect), anti-pad sizing for impedance matching, edge coupled differential pairs (or broadside coupled if necessary), single stripline construction, stackup windowing, back-drilling, etc.

  • Experienced in robust high-speed designs for high reliability in production.